Fpga design engineer in Jaipur
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Candidate should be Proficient in VHDL or Verilogand also experience with EDA tool flows for ASIC or FPGA Design ,experience developing and debugging scripts for test automation.Strong problem-solving skills and should have Ability to drive issues to closure. System level experience in digital Design involving the use of IPs such as PCI, 1553, Arinc 429, 10/100, 16550 is a plus
Experience: 1 to 3yrs experience
Note: Fresher can apply
Salary: Not a constraint for right candidate
Education: B.Sc(Electronics)/M.Sc(Electronics)
Email:niru.rrads@gmail.com
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